Timer in DFly vs FBSD

[Joerg Sonnenberger]

On Tue, Nov 23, 2004 at 07:03:57PM +0000, Jonathon McKitrick wrote:
> 
> Why is the timer in DFly handled differently between the 2 OSes?  I noticed
> the main web page says that gives us fine grained timer abstraction.  How
> so?  And why does DFly want Timer 2?

The first timer is used for the normal interval timer. E.g. if you setup
a timer in the kernel (callout_reset), you add them to a special list.
The entries are relative to the predecessor and you configure the timer
chip to launch an interrupt when the first timer of the list has experied.
This is identical to what FreeBSD is doing.

FreeBSD uses the first timer also for book keeping of the system time. If
you have a lot of timers in the kernel, the setup costs and interrupt latency
can generate a measurable drift in the system time, which is depending
e.g. on the workload of the kernel. They "compensated" this by using
alternative timers like e.g. the TSC, which introduces other problems.
In case of the TSC, it doesn't work with APM or CPU frequency scaling.

DragonFly uses the second timer mostly as counter register, with regular
overflow checks. Since the i8254 has normally a pretty stable crystal
with constant frequency, this makes the overall system time more stable.
It doesn't handle systematic clock drift, because of small mis-timing of
the quartz crystal, but this could be handled as well. If you want to
create a patch, go on :)

When I said second timer, this is infact the third timer of the i8254,
since the enumeration starts at 0. Using the option TIMER_USE_1, you
can switch the third timer and the second one, which allows you to
reactive the PC-Speaker. That one is hardwired to the Timer 2 of the
i8254. Isn't the IBM PC a wonderful hardware design? Just to complete
the description, the Timer 1 of the i8254 has been used for DRAM
refreshes in the early days [means 8086 & co.]. It should be unused
today.

Joerg