lenovo R60 SMP/APIC_IO woes

[Andrew Atrens]

Matthew Dillon wrote:
> :Hmm. I though APIC_IO was needed for SMP to work... I've
> :never been 100% sure about how the two
> :are coupled though.
> 
>     Most SMP systems ought to work without APIC_IO.  Basically there are
>     two types of APICs.  Each cpu has a LAPIC, and the motherboard chipset
>     has one or more IOAPICs.  SMP requires the per-cpu LAPIC to be present
>     but doesn't require the IOAPICs.

Nice to know! Thanks Matt!

> 
>     When you compile a SMP kernel without APIC_IO it will compile in LAPIC
>     support but not IOAPIC support, and depends on the legacy 8259 (called
>     the 'PIC') to route interrupts, which is sometimes more compatible
>     with the BIOS.

In the last few hours I've noted about 24 'stray interrupt 7' messages while
running SMP (no IOAPIC) .. I'm guessing that these are incorrectly routed
interrupts?

>     There are lots of potential gotchas but usually a SMP box will work
>     in one or the other modes (IOAPIC or legacy PIC).  If all else fails
>     you can turn on emergency interrupt polling in /boot/loader.conf or
>     with a sysctl.  With emergency interrupt polling turned on only the
>     timer and IDE disk IRQs need to be properly routed, and they
>     usually are.

> 
>     kern.emergency_intr_enable	(default 0 = off)
>     kern.emergency_intr_freq	(default 10 = 10hz)

Do these need to be set by the bootloader, I suppose so, eh ?


Thanks for all the info, Matt!  As always you're a great help!

. . any ideas about my other problem (previous message) wrt 1/2 speed kernel builds?


Cheers,

Andrew