NUMA memory support

[David Rhodus]

On Sun, 24 Oct 2004 15:49:38 +0200, Simon 'corecode' Schubert
<corecode at xxxxxxxxxxxx> wrote:
> CC: kernel, where more appropriate
> 
> On 24.10.2004, at 05:11, David Rhodus wrote:
> > The NUMA memory addressing support is built into the hardware, to be
> > specific the bios.  But to truly take advantage of NUMA the operating
> > system needs to differentiate things on the per-cpu bases.  The
> > per-cpu segmentation is a part of the fundamental design and
> > implementation of DragonFly. This allows for DragonFly to achieve
> > enhanced performance and greater reliability over other operating
> > systems.
> 
> But doesn't this for example mean that data originating from hardware
> (DMA) needs to be assigned to one CPU beforehand? For example, network
> packets somehow need to be assigned to the right CPU before they are
> evaluated, so that DMA will put them into the right memory area.
> Otherwise it could happen that a TCP packet arrives in CPU #1's memory,
> but gets dispatched to CPU #2's TCP thread (because of the connection
> hash). Now this thread needs to work on an mbuf that doesn't lie in
> local memory. Or am I complicating stuff?
> 

Its called I/O APIC PCI interrupt routing, this goes on in the back
end and in this example binds a NIC to a specific processor.  Though
there are other considerations the algorithms in use have to make
depending on how the data is going to be used.

-- 
                                            -David
                                            Steven David Rhodus
                                            <drhodus at xxxxxxxxxxx>