Crazy clock

[Matthew Dillon]

    On SMP boxes there is a known issue with interrupt forwarding that can
    cause high latencies on clock interrupts, which would have the effect
    of the clock running slower then normal (but not half speed or faster then
    normal).

    On UP boxes the problem ought to be fixed in HEAD unless a whole lot of
    VESA calls are being made.  This would be the timer 1 / timer 2 issue.
    Compiling a kernel with the TIMER_USE_1 option might help here, but could
    cause problems as well.  However, either way we do now have code in the
    kernel to detect when the BIOS munges the 8254, so 'dmesg' output after
    the machine has been running for a while ought to indicate whether the
    BIOS is messing with the 8254 or not.

    Also, try compiling a kernel with the CLK_USE_I8254_CALIBRATION
    option, do a boot -v, let the box run for a while, and post the dmesg
    output.

						-Matt