[GSOC] Implement hardware nested page table support for vkernels

Mihai Carabas mihai.carabas at gmail.com
Sun Jun 23 12:16:33 PDT 2013


I will make a brief description of what I've done this week. First I will
make a short paragraph with my joy while getting up a new development

At the begining of the week I received at my school some HP blades [1],
with Xeon processors that supports EPT. I decided to move from the Corei3
desktop and create a new developing environment. After struggling with the
HP iLO virtual console, I installed the DFly on it (at first I tried with
the virtual CD-ROM and it didn't work because dragonfly wasn't recognizing
the devices, than moved to the virtual USB drive and it worked). After a
lost day, I managed to install it and have this ACPI warnings[2]. Booting
without ACPI, failed with a panic [3] (the console has no buffer, so I
can't give you more output). There wouldn't be any problem (only annoying
prints to the console), but at a reboot the machine freezes in this state
[4]. Yesterday swildner came with the notice to put in boot/loader.conf the
"debug.acpi.disabled="thermal"" and the warning messages dissapeared, but
the reboot still blocks. Further more, I investigate with swildner and
found out that there is no driver for my 10gbit ethernet card[5] (Emulex).
swildner tried to make a port from the OCE Freebsd driver [6], but I didn't
get to test it yet. I will come the next days with a feedback.

Meanwhile, to not loose time, I moved my development process to a HP
desktop with a Corei5 (second generation) that came at the package with the
blades. The installation worked smoothly.

I created a new branch "virt_ept" and my code will be available on
Github[7] and on the Leaf[8], both remotes will be updated at the same time.

Until now I created some stub interfaces for the micro-hypervisor and
separate implementation in two files (vmx.c for Intel and svm.c for AMD).
The AMD implementation will remain as a stub for the moment. In the Intel
one, I started adding MSR registers and some bit values needed for
extension availability checks before executing the vmxon operation (there
are some default settings that need to be on 1 all the time). All of the
features probably will be on their default values. The EPT, VPID and some
VMENTER/VMEXIT features will be activated (I'm still studying the manual).
Also I created some wrappers on top of the asm instruction (vmxon, vmxoff,
vmwrite, vmread). I created a macro for the error code that will be
interpreted as is stated in the  "Section 30.2 CONVENTIONS" of the Intel
system programming guide - Vol3 [9]. The next step is to implement the
third algorithm from the "31.5.1 Algorithms for Determining VMX
Capabilities" in order to determine the default values of all the VMX
extensions. This algorithm will be also used when activating an extension,
in order to be sure it is supported (here we are particular interested in
EPT and VPID). After that I will execute the vmxon instruction to see if
the system works with the extensions activated. I will come with a reply
the next days with my results.

[2] http://mihai.micosconstruct.ro/err2.png
[3] http://mihai.micosconstruct.ro/err.png
[4] http://mihai.micosconstruct.ro/err3.png
[5] http://mihai.micosconstruct.ro/ethernet.png
[7] https://github.com/mihaicarabas/dragonfly/commits/virt_ept
[9] http://mihai.micosconstruct.ro/intel-3c-part3.pdf

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