compiling NATA

YONETANI Tomokazu qhwt+dfly at les.ath.cx
Mon Feb 26 07:00:09 PST 2007


On Mon, Feb 26, 2007 at 01:19:13PM +0000, Thomas E. Spanjaard wrote:
> km b wrote:
> >Attaching the dmesg output. Please let me know what's going wrong.
> 
> atapci0: <nVidia nForce MCP51 UDMA133 controller> port 0x3080-0x308f at 
> device 13.0 on pci0
> ata0: <ATA channel 0> on atapci0
> device_probe_and_attach: ata0 attach returned 6
> ata1: <ATA channel 1> on atapci0
> device_probe_and_attach: ata1 attach returned 6
> 
> Because you don't have PCI_MAP_FIXUP enabled, legacy interrupt and IO 
> mappings aren't established, making this controller unusable.
> 
> atapci1: <nVidia nForce MCP51 SATA300 controller> port 
> 0x3090-0x309f,0x30a0-0x30a3,0x30a
> 8-0x30af,0x30a4-0x30a7,0x30b0-0x30b7 irq 5 at device 14.0 on pci0
> ata2: <ATA channel 0> on atapci1
> ata3: <ATA channel 1> on atapci1
> 
> This one obviously attaches right. Now, what I don't get is why it 
> doesn't work when legacy irq/io mappings are enabled for atapci0. Could 
> you perhaps dig up an older dmesg, to compare e.g. IO ports to see if 
> there's a conflict somewhere?

BTW, according to FreeBSD's commit log, our NATA driver has broken revision
with regard to some of nForce / nVidia chips.  Time to merge recent changes?

Cheers.
Merge from FreeBSD:
- Unbreak nForce3 SATA support.
- Unbreak nForce4 SATA support.
- Properly initialize the nVidia MCP5X interrupts etc.

Obtained-from: FreeBSD
  ata-chipset.c revs 1.167-1.168,1.172
  ata-pci.h revs 1.67-1.68


diff -u ata-chipset.c
--- ata-chipset.c	Tue Feb 20 19:55:32 2007 +0900
+++ ata-chipset.c	Fri Jan 26 01:10:39 2007 +0900
@@ -23,7 +23,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * $FreeBSD: src/sys/dev/ata/ata-chipset.c,v 1.166 2006/07/24 10:44:50 sos Exp $
+ * $FreeBSD: src/sys/dev/ata/ata-chipset.c,v 1.168 2006/08/11 21:19:29 sos Exp $
  * $DragonFly: src/sys/dev/disk/nata/ata-chipset.c,v 1.3 2006/12/22 23:26:16 swildner Exp $
  */
 
@@ -2834,17 +2834,17 @@ ata_nvidia_ident(device_t dev)
      { ATA_NFORCE3_PRO_S1,  0, 0,         0,       ATA_SA150, "nForce3 Pro" },
      { ATA_NFORCE3_PRO_S2,  0, 0,         0,       ATA_SA150, "nForce3 Pro" },
      { ATA_NFORCE_MCP04,    0, AMDNVIDIA, NVIDIA,  ATA_UDMA6, "nForce MCP" },
-     { ATA_NFORCE_MCP04_S1, 0, 0,         NV4BYTE, ATA_SA150, "nForce MCP" },
-     { ATA_NFORCE_MCP04_S2, 0, 0,         NV4BYTE, ATA_SA150, "nForce MCP" },
+     { ATA_NFORCE_MCP04_S1, 0, 0,         NV4,     ATA_SA150, "nForce MCP" },
+     { ATA_NFORCE_MCP04_S2, 0, 0,         NV4,     ATA_SA150, "nForce MCP" },
      { ATA_NFORCE_CK804,    0, AMDNVIDIA, NVIDIA,  ATA_UDMA6, "nForce CK804" },
-     { ATA_NFORCE_CK804_S1, 0, 0,         NV4BYTE, ATA_SA300, "nForce CK804" },
-     { ATA_NFORCE_CK804_S2, 0, 0,         NV4BYTE, ATA_SA300, "nForce CK804" },
+     { ATA_NFORCE_CK804_S1, 0, 0,         NV4,     ATA_SA300, "nForce CK804" },
+     { ATA_NFORCE_CK804_S2, 0, 0,         NV4,     ATA_SA300, "nForce CK804" },
      { ATA_NFORCE_MCP51,    0, AMDNVIDIA, NVIDIA,  ATA_UDMA6, "nForce MCP51" },
-     { ATA_NFORCE_MCP51_S1, 0, 0,         NV4WORD, ATA_SA300, "nForce MCP51" },
-     { ATA_NFORCE_MCP51_S2, 0, 0,         NV4WORD, ATA_SA300, "nForce MCP51" },
+     { ATA_NFORCE_MCP51_S1, 0, 0,         NV4|NVQ, ATA_SA300, "nForce MCP51" },
+     { ATA_NFORCE_MCP51_S2, 0, 0,         NV4|NVQ, ATA_SA300, "nForce MCP51" },
      { ATA_NFORCE_MCP55,    0, AMDNVIDIA, NVIDIA,  ATA_UDMA6, "nForce MCP55" },
-     { ATA_NFORCE_MCP55_S1, 0, 0,         NV4WORD, ATA_SA300, "nForce MCP55" },
-     { ATA_NFORCE_MCP55_S2, 0, 0,         NV4WORD, ATA_SA300, "nForce MCP55" },
+     { ATA_NFORCE_MCP55_S1, 0, 0,         NV4|NVQ, ATA_SA300, "nForce MCP55" },
+     { ATA_NFORCE_MCP55_S2, 0, 0,         NV4|NVQ, ATA_SA300, "nForce MCP55" },
      { 0, 0, 0, 0, 0, 0}} ;
     char buffer[64] ;
 
@@ -2883,19 +2883,23 @@ ata_nvidia_chipinit(device_t dev)
 	    /* enable control access */
 	    pci_write_config(dev, 0x50, pci_read_config(dev, 0x50, 1) | 0x04,1);
 
-	    if (ctlr->chip->cfg2 == NV4BYTE) {
+	    if (ctlr->chip->cfg2 & NVQ) {
 		/* clear interrupt status */
-		ATA_OUTB(ctlr->r_res2, offset, 0xff);
+		ATA_OUTL(ctlr->r_res2, offset, 0x00ff00ff);
 
 		/* enable device and PHY state change interrupts */
-		ATA_OUTB(ctlr->r_res2, offset + 1, 0xdd);
+		ATA_OUTL(ctlr->r_res2, offset + 4, 0x000d000d);
+
+		/* disable NCQ support */
+		ATA_OUTL(ctlr->r_res2, 0x0400,
+			 ATA_INL(ctlr->r_res2, 0x0400) & 0xfffffff9);
 	    } 
 	    else {
 		/* clear interrupt status */
-		ATA_OUTL(ctlr->r_res2, offset, 0x00ff00ff);
+		ATA_OUTB(ctlr->r_res2, offset, 0xff);
 
 		/* enable device and PHY state change interrupts */
-		ATA_OUTL(ctlr->r_res2, offset + 4, 0x00dd00dd);
+		ATA_OUTB(ctlr->r_res2, offset + 1, 0xdd);
 	    }
 
 	    /* enable PCI interrupt */
@@ -2943,17 +2947,17 @@ ata_nvidia_status(device_t dev)
     struct ata_channel *ch = device_get_softc(dev);
     int offset = ctlr->chip->cfg2 & NV4 ? 0x0440 : 0x0010;
     struct ata_connect_task *tp;
-    int shift = ch->unit << (ctlr->chip->cfg2 == NV4BYTE ? 2 : 4);
+    int shift = ch->unit << (ctlr->chip->cfg2 & NVQ ? 4 : 2);
     u_int32_t status;
 
     /* get and clear interrupt status */
-    if (ctlr->chip->cfg2 == NV4BYTE) {
+    if (ctlr->chip->cfg2 & NVQ) {
+	status = ATA_INL(ctlr->r_res2, offset);
+	ATA_OUTL(ctlr->r_res2, offset, (0x0f << shift) | 0x00f000f0);
+    }
+    else {
 	status = ATA_INB(ctlr->r_res2, offset);
 	ATA_OUTB(ctlr->r_res2, offset, (0x0f << shift));
-    }
-    else {
-	status = ATA_INL(ctlr->r_res2, offset);
-	ATA_OUTL(ctlr->r_res2, offset, (0x0f << shift));
     }
 
     /* check for and handle connect events */
@@ -2972,6 +2976,7 @@ ata_nvidia_status(device_t dev)
 
     /* check for and handle disconnect events */
     if ((status & (0x08 << shift)) &&
+	!((status & (0x04 << shift) && ATA_IDX_INL(ch, ATA_SSTATUS))) &&
 	(tp = (struct ata_connect_task *)
 	      kmalloc(sizeof(struct ata_connect_task),
 		   M_ATA, M_NOWAIT | M_ZERO))) {
diff -u ata-pci.h
--- ata-pci.h	Tue Feb 20 19:55:32 2007 +0900
+++ ata-pci.h	Fri Jan 26 01:10:39 2007 +0900
@@ -23,7 +23,7 @@
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * $FreeBSD: src/sys/dev/ata/ata-pci.h,v 1.66 2006/07/24 10:44:50 sos Exp $
+ * $FreeBSD: src/sys/dev/ata/ata-pci.h,v 1.68 2006/08/11 21:19:29 sos Exp $
  * $DragonFly: src/sys/dev/disk/nata/ata-pci.h,v 1.1 2006/12/04 14:40:37 tgen Exp $
  */
 
@@ -400,8 +400,7 @@ struct ata_connect_task {
 #define AMDBUG          0x0002
 #define NVIDIA          0x0004
 #define NV4             0x0010
-#define NV4BYTE         0x0030 
-#define NV4WORD         0x0050
+#define NVQ             0x0020
 #define VIACLK          0x0100
 #define VIABUG          0x0200
 #define VIABAR          0x0400




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