PAE with dragonfly

Craig Dooley xlnxminusx at
Wed Jun 8 11:50:18 PDT 2005

Doesn't AMD64 use PAE for large address spaces?  I thought the Page
Table structures were the same for both.


On 6/8/05, Joerg Sonnenberger <joerg at xxxxxxxxxxxxxxxxx> wrote:
> On Wed, Jun 08, 2005 at 10:18:02AM -0700, Matthew Dillon wrote:
> >     We don't have any PAE code in DragonFly.  I don't currently intend
> >     to add it... it's a severe hack.i [snip]
> Let me elaborate a bit more on this. PAE makes the kernel work a lot
> harder, because the kernel can't access all memory at the same time.
> This means that you have to be a lot more careful when accessing
> memory, since it might currently not be present.
> It also adds the general problem of 64bit machines in that many PCI
> bus master devices still only support "low" memory (below 4GB). For
> this reason you often don't gain anything from using it e.g. for
> buffer caching, since you have to copy it into the low memory or
> reverse before doing IO.
> Joerg

Craig Dooley <xlnxminusx at xxxxxxxxx>

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