PAE with dragonfly
sdrhodus at gmail.com
Wed Jun 8 12:49:52 PDT 2005
On 6/8/05, Craig Dooley <xlnxminusx at xxxxxxxxx> wrote:
> PAE lets you address 36 bits (although like you said, only 32 at a
> time), but it makes the paging structures 64bits long, and AMD64 long
That's not exactly what I said. With PAE on a ia32 machine you still
only allocate 4Gig of memory per-process.
> mode is built off the same structures. The AMD64 manuals say you need
> to enable PAE before enabling long mode. Granted this would probably
This is just setting a control register bit on the processor, not
actually doing the page table hacks one would have to do on ia32.
> mean only setting up a small page table before jumping to long mode,
> but wouldn't the infrastructure for PAE on x86 make it easier to
> implement AMD64?
Not really because most of the infrastructural changes needed to
support PAE are machine dependent.
Steven David Rhodus
<drhodus at xxxxxxxxxxx>
More information about the Kernel