dillon at apollo.backplane.com
Thu Jun 2 10:18:34 PDT 2005
:On Thu, Jun 02, 2005 at 09:37:28AM -0700, Matthew Dillon wrote:
:> I will do #1 today, simply by replacing all current SPL operations with
:> a critical section.
:I would expect this to hurt performance a lot.
I would expect this to hurt performance not at all.
Have you taken a look at the SPL masks recently? Just about all major
devices are covered by the most basic SPL anyway, so for all intents and
purposes a splbio() or splvm() is going to be equivalent to a critical
Also, keep in mind that the cpu is going to be executing instructions
no matter what while in an SPL or critical section... whether they
are mainline instructions or interrupt instructions. The only issue
is interrupt *latency*, not so much cpu efficiency, and frankly SPLs
are not held long enough for interrupt latency to be effected virtually
at all, and even then we are only talking about a few microseconds at
So the answer is: It won't hurt performance.
<dillon at xxxxxxxxxxxxx>
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