git: kernel - Spread IPIs out to more priority levels

[Matthew Dillon]

commit f240042b9f9bcfdacd70499659fcc5f55d5e49ab
Author: Matthew Dillon <dillon at apollo.backplane.com>
Date:   Sun Mar 26 23:35:55 2017 -0700

    kernel - Spread IPIs out to more priority levels
    
    * Due to the brandamaged way the LAPIC queues received IPIs, each
      priority level (the top 4 bits of the 8 bit vector) has a 2-entry
      FIFO.  Bring in comments from FreeBSD on how this works.
    
    * Change our IPI vectors which previously used 2 priority levels to now
      use 3 priority levels.  Each source is generally limited by an atomic
      op to avoid multi-queueing and hopefully that means the above LAPIC hw
      queue will never refuse to accept an IPI.
    
      IPIQ and TIMER use group 1
    
      INVLTLB (and INVLPG) uses group 2
    
      SNIFF, CPUSTOP, and SPURIOUSINT use group 3
    
    * Reduces the number of vectors available per cpu by 16, but shouldn't
      present that big a problem.

Summary of changes:
 sys/platform/pc64/apic/ioapic_abi.c      |  6 +++-
 sys/platform/pc64/include/intr_machdep.h | 58 ++++++++++++++------------------
 sys/platform/pc64/x86_64/msi.c           |  8 +++--
 3 files changed, 37 insertions(+), 35 deletions(-)

http://gitweb.dragonflybsd.org/dragonfly.git/commitdiff/f240042b9f9bcfdacd70499659fcc5f55d5e49ab


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