commit c17a6852f80ce59ea0641ae01d0b3c52f0584101
Author: Matthew Dillon <dillon at apollo.backplane.com>
Date: Fri Nov 11 22:31:27 2011 -0800
kernel - Fix IPI signaling issue, add a few assertions
* Change the low-level IPI code to physically disable interrupts when
waiting for the ICR status bit to clear and issuing a new IPI. It
appears that on Intel cpus it is possible for (with circumstantial
evidence) a LAPIC EOI to busy the command sequencer.
Thus if interrupts are enabled inside a critical section, even if all
they do is EOI the LAPIC and IRET, this can prevent an IPI from being
sent if the interrupt occurs at just the right moment during an IPI
operation.
* Because IPIs are already limited to one per target cpu at any given
moment via gd->gd_npoll we can also do away with the ipiq polling
code that was inside the ICR wait.
* Add a few assertions to try to catch other possible MP problems.
Assert that TDF_TSLEEPQ is not set when freeing a thread.
Assert that the cpusync ipiq does not overflow.
Assert that the vm_object hold count does not go negative.
Reported-by: ftigeot
Summary of changes:
sys/kern/lwkt_ipiq.c | 10 ++++++
sys/kern/lwkt_thread.c | 3 +-
sys/platform/pc64/apic/lapic.c | 64 ++++++++++++++++++++-------------------
sys/vm/vm_object.c | 1 +
4 files changed, 46 insertions(+), 32 deletions(-)
http://gitweb.dragonflybsd.org/dragonfly.git/commitdiff/c17a6852f80ce59ea0641ae01d0b3c52f0584101
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