lenovo R60 SMP/APIC_IO woes

Matthew Dillon dillon at apollo.backplane.com
Mon Apr 23 08:45:00 PDT 2007

:Whoa! 4 minutes!  Very cool!
:Mucho better!  :) :)
:Now .. speculating as to the cause ... could it be that interrupts are only being delivered to
:CPU0 and not CPU1 ?  That would explain the roughly 1/2 speed slow down during the test if both
:cpus were alternating running compile processes ..

    Nope. Well, yup... but that's normal.  When the PIC is used interrupts
    are usually only delivered to one cpu.  But it wouldn't cause a
    slow down.  Performance would be about the same.

					Matthew Dillon 
					<dillon at backplane.com>

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