GSoC: Add SMT/HT awareness to DragonFlyBSD scheduler

Mihai Carabas mihai.carabas at gmail.com
Sun Jun 17 11:15:39 PDT 2012


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Hello,

This week I have tested my CPU topology detection on different platforms
and I found some bugs and fix them on AMD (thanks to profmakx from IRC for
giving me access to his 8-core AMD bulldozer).
I also implemented a schedule policy as following:
- when a process is scheduled, it first looks for free CPUs, which have
their sibling free too (both threads are free)
- if not found, then it searches for the process who has the lowest
lwp_batch (so a process which is not so CPU hungry)
- added a sysctl option to enable/disable the HT awareness of the schedule.
Also a little refactoring: created a sysctl branch usched_bsd4 where I
added all usched_bsd4 specific parameters.

Those two rules stabilized the time needed to run when there are only two
processes (they are scheduled on different cores). I will come tomorrow in
the afternoon with some tests.

I will continue testing my implementations on vkernels and compiling
without SMP support (I found that there are some compile problems).

Thanks,
Mihai C.

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Hello,<div><br></div><div>This week I have tested my CPU topology detection=
 on different platforms and I found some bugs and fix them on AMD (thanks t=
o profmakx from IRC for giving me access to his 8-core AMD bulldozer).</div=
>
<div>I also implemented a schedule policy as following:</div><div>- when a =
process is scheduled, it first looks for free CPUs, which have their siblin=
g free too (both threads are free)</div><div>- if not found, then it search=
es for the process who has the lowest lwp_batch (so a process which is not =
so CPU hungry)</div>
<div>- added a sysctl option to enable/disable the HT awareness of the sche=
dule. Also a little refactoring: created a sysctl branch usched_bsd4 where =
I added all usched_bsd4 specific parameters.</div><div><br></div><div>Those=
 two rules stabilized the time needed to run when there are only two proces=
ses (they are scheduled on different cores). I will come tomorrow in the af=
ternoon with some tests.
</div><div><br></div><div>I will continue testing my implementations on=A0v=
kernels and=A0compiling without SMP support (I found that there are some co=
mpile problems).</div><div><br></div><div>Thanks,</div><div>Mihai C.</div>

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